SAN JOSE, Calif. -The 62nd IEEE International Electron Devices Meeting will continue the event¡¯s work of scanning the silicon horizon with talks, tutorials and panels on topics such as quantum and neuromorphic computing, according to a just-released preliminary program. This year IEDM pushed out its paper deadline to August 10 and plans it¡¯s first-ever supplier exhibition at the event slated for Dec. 3-7 in San Francisco.
Brain-inspired computing is the focus of one of the event¡®s three keynotes as well as a 90-minute tutorial. IBM Fellow and Chief Scientist Dharmendra S. Modha will deliver a keynote on the topic. A researcher from the University of Zurich will give a tutorial that includes examples of neuromorphic circuits, processors and some of their applications.
A special focus session will explore materials, devices and circuits for quantum computing seen as one of several candidates for device scaling beyond the limits of Moore¡¯s law. A 90-minute tutorial will provide an update on spintronics, a way of harnessing novel magnetic properties to create innovative chip architectures.
Another focus session will explore ¡°ãtechnology gaps [that] continue to prevent spectrum above millimeter-wave frequencies from being fully used¡°.It will examine work on ¡±ãultra-high speed devices and circuits based on high-electron-mobility transistors, heterojunction bipolar transistors and conventional CMOS devices¡®[including] antennas for ultra-high-speed systems; ultra-high-frequency oscillators,¡±organizers said.
Two all-day short courses will explore somewhat less far-future topics. One will present thoughts on the outlook for the 5nm process node with speakers from Applied Materials, Lam Research, Tokyo Electron and elsewhere. A separate course will discuss emerging computing architectures with talks from Nvidia, Texas Instruments, TSMC and Xilinx.
Silicon experts will also give their views on the subject of wearables and the Internet of Things in a keynote from the chief executive of Europe¡®s Leti research institute as well as an evening panel and a focus session. The conference typically presents more than 200 technical papers representing the wide range work in semiconductor and other chip-level devices.
--Rick Merritt, Silicon Valley Bureau Chief, EE Times.